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林維亮副教授兼孟堯晶片中心主任 - 系統晶片組
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最高學歷
Northwestern University, PhD
重要經歷
台大電機糸和電機研究所固態電子組畢業。碩士論文題目是『非晶矽碳氫特性研究』。
美國西北大學攻讀資訊博士,博士論文題目是『邏輯合成與實體設計的相互作用』。
之後,加入Intel 五年並榮幸地能在Pentium 4 及 Itanium 團隊分別從事設計自動化及數位電路設計。
接著,由於對整個糸統的興趣,加入Cypress Semiconductor二年以從事類比電路設計,
並同時在Stanford university 修各種類比電路設計課程。
此時揚智科技有缺,即加入並從事混合訊號電路設計二年。
研究領域
自2017/2起,全力在人工智慧領域,希望幫忙創造訓練資料,來訓練相對應演算法。
學術服務
榮譽獎勵
學術著作
● 期刊論文 
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Wei-Liang Lin, Chen-Hao Chang, Shing-Yan Liang, Zhi-Xun Liu, and Siou-Wei Su, “Time-distributed procedure for fast estimation of effective number of bits during ADC Design,” IEICE Electronics Express (IF=0.427, Rank=195/247, 2010), vol. 20, no. 8, pp. 1703-1709 , 10 2011. (EI、SCI)
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Lin, W.-L.; Cheng, W.-C.; Wu, C.-H.; Wu, H.-M.; Wu, C.-Y.; Ho, K.-H.; Chan, C.-A.; , “A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement,” IEEE Transactions on Education (IF=0.822, Rank=13/27, 2009), vol. 2, no. 53, pp. 282-287, 05 2010. (EI、SCI)
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Wei-Liang Lin, Amir H. Farrahi, and M. Sarrafzadeh, “On the Power of Logic Resynthesis,” SIAM J. Comput., no. V29N4, pp. 1257-1289, 2000. (SCI)
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Majid Sarrafzadeh, Wei-Liang Lin, and C. K. Wong, “Floating Steiner Trees,” IEEE Trans. on Computers, no. V47N2, pp. 197-211, 02 1998. (SCI)
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Hsiung-Kuang Tasi, Wei-Liang Lin, Wen Jyh Sah, and Si-Chen Lee, “The Characteristics of Amorphous Silicon Carbide Hydrogen Alloy,” J. Appl. Phys., no. V64N4, pp. 1910-1915, 08 1988. (SCI)
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Wei-Liang Lin, Hsiung-Kuang Tsai, Si-Chen Lee, Wen-Jyh Sah, and Wen-Jer Tzeng, “Identification of Infrared Absorption Peaks of Amorphous Silicon-carbon Alloy by Thermal Annealing,” Appl. Phys. Lett., no. V51N25, pp. 2112-2114, 12 1987. (SCI)
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Hsiung-Kuang Tsai, Si-Chen Lee, and Wei-Liang Lin, “An Amorphous SiC/Si Two-Color Detector,” IEEE Electron Device Lett., no. EDL-8N8, pp. 365-367, 08 1987. (SCI)
● 研討會論文 
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Lung-Yang Chung, Han-Ting Chen, Jhih-Chen Hsueh, and Wei-Liang Lin, “Object Recognition Assisted with Virtual Data,” 2018 Taiwan and Japan Conference on Circuit and Systems (TJCAS 2018), 08 2018. Taichung City, Taiwan,
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Bing-Jun Tsai, Fang-An Lee, Chun-Hao Chang , Wei-Liang Lin, “A 2.6GS/s 8 bits Time-interleaved SAR ADC with Time-Skew Calibration,” The 26th VLSI Design/CAD Symposium, pp. S12-04, 08 2015. Hua-Lein, Taiwan,
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Chang-Yu Wu, Wei-Liang Lin, “A 6-bit 2-GSamples/s Binary-Weighted Current-Steering D/A Converter,” The 20th VLSI Design/CAD Symposium, 08 2009. Hua-Lein, Taiwan,
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W.L. Lin and M. Sarrafzadeh, “A Linear Arrangement Problem with Applications,” Proc. IEEE Int. Symp. on Circuit and System, 05 1995. (EI)
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W.L. Lin, M. Sarrafzadeh, and C.K. Wong, “The Reproducing Placement Problem with Applications,” ICCAD-94, 1994. (EI)