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許恒銘教授 - 系統晶片組
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射頻積體電路實驗室722B
最高學歷
國立台灣大學電機工程博士
重要經歷
訪問教授 -日本京都大學 [2019/7 ~ 2020/1.10]
教授 - 國立中興大學電機系 [2011/2 ~ 迄今]
主任 - 電機系孟堯晶片中心 [2011/8~2013/7]
副教授- 國立中興大學電機系 [2007/2 ~ 2011/1]
助理教授-國立中興大學電機系 [2003/8 ~ 2007/1]
工程師- 臺灣積體電路公司/研究發展部門 [1997/12 ~ 2003/7]
工程員- 台北捷運公司(高考及格分發)[1996/7 ~1997/3]
預官排長-中正預校[1994/7 ~ 1996/6]
電機技師-高考及格[1990]
研究領域
1.無線充電系統
2.電力感測元件,晶片電感,晶片電容,晶片真空管
3.VLSI佈局與元件
學術服務
General Chair, 2020 IEICE Asian Wireless Power Transfer Workshop
General Chair, 2017 IEEE Wireless Power Transfer Conference
IEEE Electron Devices Society
IEEE Microwave Theory and Technique Society
榮譽獎勵
中興大學九十七年度研究績優獎
國科會一百年度晶片系統國家型科技計畫,目標導向型研究計畫-績優計畫獎
教育部101-102年度智慧電子跨領域應用專題系列課程計畫主持人-綠能電子領域之特優
學術著作
● 期刊論文 
1.
Heng-Ming Hsu, Jhao-Hsiang Huang, Ting-Hao Peng, and Nai-Chen Liu, “Design of coil length of on-chip transformer with high turn ratio and high coupling performance,” IEEE Trans. on Electron Devices, vol. 11, no. 59, pp. 3061-3068, 11 2012. (EI、SCI)
2.
Heng-Ming Hsu, Tai-Hsin Lee, and Chan-Jung Hsu,, “Millimeter-wave transmission line in 90-nm CMOS technology,” IEEE Journal on Emerging and Selected Topics in Circuits and System, no. 2, pp. 194-199, 06 2012. (EI、SCI)
3.
Heng-Ming Hsu, Szu-Han Lai, and Chan-Jung Hsu, “Compact layout of on-chip transformer,” IEEE Trans. on Electron Devices, no. 57, pp. 1076-1083, 05 2010. (EI、SCI)
4.
Heng-Ming Hsu, and Jhao-Siang Huang, Szu-Yuan Chen, and Szu-Han Lai, “Design of an on-chip balun with a minimum amplitude imbalance using a symmetric stack layout,” IEEE Trans. on Microwave Theory and Techniques, no. 58, pp. 814-819, 04 2010. (EI、SCI)
5.
Heng-Ming Hsu, and Hung-Chi Chien, “High-Q transformers in copper-interconnection CMOS technology,” IEEE Trans. on Components and Packaging Technologies, no. 32, pp. 578-584, 09 2009. (EI、SCI)
6.
Heng-Ming Hsu, and Kun-Yu Chen, “High turn ratio and high coupling coefficient transformer in 90-nm CMOS technology,” IEEE Electron Device Letters, no. 30, pp. 535-537, 05 2009. (EI、SCI)
7.
Heng-Ming Hsu, Kai-Yuan Chan, Hung-Chi Chien, and Han-Chien Kuan, “Analytical design algorithm of planar inductor layout in CMOS technology,” IEEE Trans. on Electron Devices, no. 55, pp. 3208-3213, 11 2008. (EI、SCI)
8.
Heng-Ming Hsu, and Ming-Ming Hsieh, “On-chip inductor above dummy metal patterns,” Solid-State Electronics, no. 52, pp. 998-1001, 07 2008. (EI、SCI)
9.
Heng-Ming Hsu, and Tai-Hsing Lee, “Compact layout of DT-MOS transistor with source-follower subcircuit in 90-nm CMOS technology,” IEEE Electron Device Letters, no. 29, pp. 392-395, 04 2008. (EI、SCI)
10.
Heng-Ming Hsu, Chien-Wen Tseng, and Kai-Yuen Chan, “Characterization of on-chip transformer using microwave technique,” IEEE Trans. on Electron Devices, no. 55, pp. 833-837, 03 2008. (EI、SCI)
11.
Heng-Ming Hsu, and Jeng-Zen Chang, “Mutual coupling of on-chip inductors in CMOS technology,” Journal of Micromechanics and Microengineering, no. 18, pp. 035029(5pp), 03 2008. (EI、SCI)
12.
Heng-Ming Hsu, Chien-Wen Tseng, and Hsien-Feng Liao, “Analysis on the mutual inductance of planar transformer in CMOS technology,” Microelectronic Engineering, no. 85, pp. 227-232, 01 2008. (EI、SCI)
13.
Heng-Ming Hsu and Chien-Wen Tseng, “Design of on-chip transformer with various coil widths to achieve minimal metal resistance,” IEEE Electron Device Letters, no. 28, pp. 1029-1032, 11 2007. (EI、SCI)
14.
Heng-Ming Hsu, Ming-Chang Tsai, and Kuo-Hsun Huang, “An on-chip transformer in silicon-based technology,” Journal of Micromechanics and Microengineering, no. 17, pp. 1504-1510, 08 2007. (EI、SCI)
15.
Heng-Ming Hsu, Jen-Zien Chang, and Hung-Chi Chien, “Coupling effect of on-chip inductor with variable metal width,” IEEE Microwave and Wireless Components Letters, no. 17, pp. 498-500, 07 2007. (EI、SCI)
16.
Heng-Ming Hsu, “Qualitative analysis on gain compression in power MOS transistor,” Solid-State Electronics, no. 51, pp. 920-924, 06 2007. (EI、SCI)
17.
Ching-Liang Dai, Heng-Ming Hsu, Ming-Chang Tsai, Ming-Ming Hsieh and Ming-Wei Chang, “Modeling and fabrication of a microelectromechanical microwave switch,” Microelectronics Journal, no. 38, pp. 519-524, 04 2007. (EI、SCI)
18.
Heng-Ming Hsu, “Implementation of 0.18um RFCMOS Technology for System-on-a-Chip Applications,” IEE-Proceeding Microwave Antenna and Propagation, no. 153, pp. 516-522, 12 2006. (EI、SCI)
19.
Heng-Ming Hsu and Tai-Hsing Lee, “High LO-RF isolation of zero-IF mixer in 0.18 μm CMOS technology,” Analog Integrated Circuits and Signal Processing, no. 49, pp. 19-25, 10 2006. (EI、SCI)
20.
Heng-Ming Hsu, “Investigation on the layout parameters of on-chip inductor,” Microelectronics Journal, no. 37, pp. 800-803, 08 2006. (EI、SCI)
21.
Heng-Ming Hsu and Tai-Hsing Lee, “Optimum bias of power transistor in 0.18um CMOS technology for Bluetooth application,” Solid-State Electronics, no. 50, pp. 412-415, 03 2006. (EI、SCI)
22.
Ching-Liang Dai, Heng-Ming Hsu, Mao-Chen Liu, Yu-Ren Li, and Ming-Wei Chang, “Fabrication of a micromachined tunable capacitor using the complementary metal-oxide semiconductor post-process of etching metal layers,” Japanese Journal of Applied Physics, no. 45, pp. 1018-1020, 02 2006. (EI、SCI)
23.
Heng-Ming Hsu, “Implementation of high-coupling and broadband transformer in RFCMOS technology,” IEEE Tran. Electron Devices, no. 52, pp. 1410-1414, 07 2005. (EI、SCI)
24.
Heng-Ming Hsu, “Improving the quality factor of broaden spiral inductor with arithmetic progression step width,” Microwave and Optical Technology Letters, no. 45, pp. 118-120, 04 2005. (EI、SCI)
25.
Heng-Ming Hsu, “Effective series-resistance model of spiral inductors,” Microwave and Optical Technology Letters, no. 46, pp. 107-109, 01 2005. (EI、SCI)
26.
Ching-Liang Dai, Hsuan-Jung Peng, Mao-Chen Liu, Chyan-Chyi Wu, Heng-Ming Hsu, Lung-Jieh Yang, “A micromachined microware switch fabricated by the complementary metal-oxide semiconductor post-process of etching silicon dioxide,” Japanese Journal of Applied Physics, no. 44, pp. 6804-6809, 2005. (EI、SCI)
27.
Heng-Ming Hsu, “Analytical formula for inductance of metal of various widths in spiral inductors,” IEEE Tran. Electron Devices, no. 51, pp. 1343-1346, 08 2004. (EI、SCI)
28.
Heng-Ming Hsu, Jiong-Guang Su, Chih-Wei Chen, Denny D. Tang, Chun Hsiung Chen, and, Jack Yuan-Chen Sun, “Integrated power transistor in 0.18-um CMOS technology for RF system-on-chip applications,” IEEE Tran. Microwave Theory and Techniques, no. 50, pp. 2873-2881, 12 2002. (EI、SCI)
29.
Jiong-Guang Su, Heng-Ming Hsu, Shyh-Chyi Wong, Chun-Yen Chang, Tiao-Yuan Huang, and ,Yuan-Chen Sun, “Improving the RF performance of 0.18 um CMOS with deep n-well implantation,” IEEE Electron Device Letters, no. 22, pp. 481-483, 10 2001. (EI、SCI)
● 研討會論文 
1.
Heng-Ming Hsu , Sih-Han Lai, Meng-Syun Chen, and Hsien-Feng Liao,, “Investigation on the mutual inductance of on-chip transformers,” IEEE CPMT Symposium Japan, 12 2012. 日本京都,
2.
Heng-Ming Hsu , Yi-Te Chou, Yo-Hao Hsu, and Yue-Shiang Shu, “An inductorless frequency divider with 15GHz locking range using 90nm CMOS technology,” IEEE International Symposium on Circuits and Systems, ISCAS, 05 2012. 韓國首爾,
3.
Heng-Ming Hsu , Chi-Hao Wang, and Yu-Dei Chou, “Double injection of a divide-by-2 LC frequency divider to enhance locking range,” IEEE Asia-Pacific Microwave Symposium, 12 2011. 澳洲墨爾本,
4.
Heng-Ming Hsu and Guan-Lin Fu, “An injection-locked LC frequency divider to achieve wide locking range and low power consumption ,” International Conference on Solid State Devices and Materials, 09 2011. 日本名古屋,
5.
Heng-Ming Hsu and Tai-Hsing Lee , “Ultra-wide-band low noise amplifier using inductive feedback in 90-nm CMOS technology,” IEEE ISCAS, International Symposium on Circuits and Systems, pp. 2470 -2473, 05 2010. 巴黎,
6.
Heng-Ming Hsu, Chan-Jung Hsu, Tai-Hsing Lee, and Chun-Sheng Wang, “Noise analysis of inductive shunt-series feedback technique used in ultra-wideband low noise amplifier,” IEEE Asia-Pacific Microwave Symposium, pp. 1136-1139, 12 2009. 新加坡,
7.
Heng-Ming Hsu, Tai-Hsing Lee, and Guan-Lin Fu, “A 90 nm DT-MOS transistor for high speed operation,” IEEE European Microwave Symposium, pp. 246-249, 09 2009. 羅馬,
8.
Heng-Ming Hsu, Sih-Han Lai, Chien-Wen Tseng, and Guan-Lin Fu, “Layout design of on-chip transformer with uniform variation of coil widths,” IEEE European Microwave Symposium, pp. 1199-1202, 09 2009. 羅馬,
9.
Heng-Ming Hsu, and Chan-Jung Hsu, “Design of broadband CMOS amplifier using bandwidth-compensation technique,” IEEE European Microwave Symposium, pp. 171-174, 10 2008. 荷蘭,
10.
Heng-Ming Hsu, Ming-Chang Tsai, and Kuo-Hsun Huang, “Four-port transformer in silicon-based technology,” IEEE European Microwave Symposium, pp. 123-126, 10 2007. 德國,
11.
Heng-Ming Hsu, and Tai-Hsing Lee, “A zero-IF sub-harmonic mixer with high LO-RF isolation using 0.18 um CMOS technology,” IEEE European Microwave Symposium, pp. 336-339, 09 2006. (EI)英國,
12.
Heng-Ming Hsu, Jeng-Zen Chang, Chien-Wen Tseng, and Kuo-Hsun Huang, “Analysis on high-coupling transformer in silicon-based technology,” IEEE European Microwave Symposium, pp. 1391-1394, 09 2006. (EI)英國,
13.
Heng-Ming Hsu, Ming-Ming Hsieh, Chien-Wen Tseng, and Kuo-Hsun Huang, “High coupling transformer in CMOS technology,” IEEE RFIC, Radio Frequency Integrated Circuits Symposium, pp. 225-228, 06 2006. (EI)美國,
14.
Heng-Ming Hsu, Ching-Liang Dai, Ming-Ming Hsieh, Ming-Chang Tsai, and Hsuan-Jung Peng, “Implementation and analysis of microwave switch in CMOS-MEMS technology,” IEEE ISCAS, International Symposium on Circuits and Systems, pp. 2285-2288, 05 2006. (EI)希臘,
15.
Heng-Ming Hsu, Tai-Hsing Lee, “Optimum quiescent point of integrated power CMOS transistor for wireless portable applications,” IEEE ISCAS International Symposium on Circuits and Systems, pp. 129-132, 06 2005. (EI)日本,
● 專書 
1.
Heng-Ming Hsu, et. al., “Si-Based semiconductor components for RF integrated circuits,” Chapter 5 Design aspects of spiral inductors on silicon, Transworld Research Network, 2006.
● 專利 
1.
Heng-Ming Hsu, and Kuo-Hsun Huang, “Three dimensional transformer,” U.S. patent: 7,405,642, 07 2008.
2.
Heng-Ming Hsu, and Kuo-Hsun Huang, “Wireless communication device and signal receiving/transmitting method thereof,” U.S. patent: 7,542,009, 06 2008.
3.
Heng-Ming Hsu, Yen-Shih Ho, “Method of fabricating a planar spiral inductor structure having enhanced Q value,” U.S. patent: 7,370,403, 05 2008.
4.
C.-H. Chen, S.-P. Ma,T.-H. Yeh, Y.-S. Ho, K.-R. Peng, Heng-Ming Hsu, K.-B. Thei, C.-W. Chou, “Method for making a new metal-insulator-metal (MIM) capacitor structure in copper-CMOS circuits using a pad protect layer,” U.S. patent: 6,881,966, 04 2005.
5.
Chen C-H, Chou C-W, Ho Y-S, Hsu Heng-Ming, Peng K-R, Yeh T-H, Ma S-P, Thei K-M, “Copper process compatible CMOS metal-insulator-metal capacitor structure and its process flow,” USA Patent no. 6,329,234.
6.
Chen C-H, Chou C-W, Ho Y-S, Hsu Heng-Ming, Peng K-R, Yeh T-H, Ma S-P, Thei K-M, “Dual damascene interconnect structures that include radio frequency capacitors and inductors,” USA Patent no. 6,472,721.
7.
Hsu Heng-Ming, Chen C-C, Huang L-K, Ma S-P, Tsai C-C, Wong S-C, “High Q inductor with Cu damascene via/trench etching simultaneous module,” USA Patent no. 6,444,517.
8.
彭國瑞,葉達勳,鄭光茗,馬思平,陳俊宏,許恒銘,何彥仕,鍾昭媛, “半導體電感元件的製造方法,” 中華民國專利證號:132416.
9.
馬思平,陳俊宏,何彥仕,許恒銘,彭國瑞,葉達勳,鄭光茗,周繼武, “整合銅導線與電容元件的製程,” 中華民國專利證號:132352.
10.
許恒銘,何彥仕, “漸增金屬寬度之電感結構,” 中華民國專利證號:134350.