Home Faculty Electronics Group Shu-Tong Chang Professor

Shu-Tong ChangProfessor - Electronics Group
Tel
(04)22851549轉702
E-Mail
Lab
Education
Ph.D., Graduate Institute of Electrical Engineerin
Experiences
Professor, Dep. of E. E.&GIOE,National Chung Hsing University, 01/08/2012-prenset
Associate Professor, Dep. of E. E.&GIOE,National Chung Hsing University, 01/08/2008-31/07/2012
Assistant Professor, Department of Electrical Engineering, National Chung Hsing University, 01/08/2005-31/07/2008
Advisor, Electronics Research & Service Organization, Industrial Technology Research Institute, 08/2003-present
Assistant Professor, Department of Electronic Engineering, Chung Yuan Christian University, 01/02/2003-31/07/2005
Research Areas
Characteristic Research on SiGe Materials & Devices
Characteristic Measurement and TCAD Simulations of Thin-Film Devices(TFT, Solar Cells)
Design of New Type CMOS Devices
Academic Service
Awards
Selected Publications
● Journal Paper 
1.
Ming-Ting Wu, Jun-Wei Fan, Kuan-Ting Chen, Shu-Tong Chang, Chung-Yi Lin, “Band Structure and Effective Mass in Monolayer MoS2,” Journal of Nanoscience and Nanotechnology, no. 15, pp. 9151–9157, 11 2015. (SCI)
2.
S.-Y. Cheng, K.-T. Chen, and S. T. Chang, “Impact of Strain on Hole Mobility in the Inversion Layer of PMOS Device with SiGe Alloy Thin Film,” Thin Solid Films, no. 584, pp. 135–140, 06 2015. (SCI)
3.
Chia-Feng Lee, Ren-Yu He, Kuan-Ting Chen, Shu-Ying Cheng, Shu-Tong Chang, “Strain engineering for electron mobility enhancement of strained Ge NMOSFET with SiGe alloy source/drain stressors,” Microelectronic Engineering, no. 138 , pp. 12–16, 01 2015. (SCI)
4.
Kuan-Ting Chen, Jun-Wei Fan, Shu-Tong Chang, and Chung-Yi Lin, “Subband Structure and Effective Mass in the Inversion Layer of a Strain Si-Based Alloy P-Type MOSFET,” Journal of Nanoscience and Nanotechnology, no. 15, pp. 2168, 01 2015. (SCI)
5.
M. H. Lee, P.-G. Chen and S. T. Chang, “Analysis of Si:C on Relaxed SiGe by Reciprocal Space Mapping for MOSFET Applications,” ECS Journal of Solid State Science and Technology, no. 3, pp. 259-262, 01 2014. (SCI)
6.
M. H. Lee, B.-F. Hsieh, S. T. Chang, “Electrical properties correlated with redistributed deep states in a-Si:H thin-film transistors on flexible substrates undergoing mechanical bending,” Thin Solid Films, vol. 15, no. 528, pp. 82-85, 01 2013. (SCI)
7.
S.T. Chang, B.-F. Hsieh, Y.-C. Liu, “A simulation study of thin film tandem solar cells with a nanoplate absorber bottom cell,” Thin Solid Films, vol. 8, no. 520, pp. 3369-3373, 02 2012. (SCI)
8.
Shu-Tong Chang, Jun Wei Fan, Chung-Yi Lin, Ta-Chun Cho, Ming Huang, “Hole effective masses of p-type metal-oxide-semiconductor inversion layer in strained Si1-xGex alloys channel on (110) and (111) Si substrates ,” Journal of Applied Physics, vol. 3, no. 111, pp. 033712-033712-8, 02 2012. (SCI)
9.
Wen-Kai Lin, Kou-Chen Liu, Shu-Tong Chang, Chi-Shiau Li, “Room temperature fabricated transparent amorphous indium zinc oxide based thin film transistor using high-κ HfO2 as gate insulator,” Thin Solid Films, vol. 7, no. 520, pp. 3079-3083, 01 2012. (SCI)
10.
C.J. Chiu , Z.W. Pei , S.T. Chang , S.P. Chang , S.J. Chang, “Effect of oxygen partial pressure on electrical characteristics of amorphous indium gallium zinc oxide thin-film transistors fabricated by thermal annealing,” Vacuum, no. 86, pp. 246-249, 01 2011. (SCI)
11.
Ting-Hsiang Huang, Kou-Chen Liu, Zingway Pei, Wen-Kai Lin, Shu-Tong Chang, “A poly(styrene-co-methyl methacrylate)/room-temperature sputtered hafnium oxide bi-layer dielectrics as gate insulator for a low voltage organic thin-film transistors,” Organic Electronics, no. 12, pp. 1527-1532, 01 2011. (SCI)
12.
Bing-Fong Hsieh and Shu-Tong Chang, “Subband Structure and Effective Mass of Relaxed and Strained Ge (110) PMOSFETs,” Solid-State Electronics, no. 60, pp. 37-41, 01 2011. (SCI)
13.
Wen-Kai Lin, Kou-Chen Liu, Jyun-Ning Chen, Sung-Cheng Hu and Shu-Tong Chang, “The influence of fabrication process on top-gate thin-film Transistors,” Thin Solid Films, no. 519, pp. 5126-5130, 01 2011. (SCI)
14.
M. H. Lee, S. T. Chang, B.-F. Hsieh, J.-J. Huang, and C.-C. Lee, “Analysis and Modeling of Nano-Crystalline Silicon TFTs on Flexible Substrate with Mechanical Strain,” Journal of Nanoscience and Nanotechnology, no. 11, pp. 1-4, 01 2011. (SCI)
15.
M. H. Lee, S. T. Chang, T.-H. Wu, W.-N. Tseng, “Driving Current Enhancement of Strained Ge (110) p-type Tunnel FETs and Anisotropic Effect,” IEEE Electron Device Letter, no. 32, pp. 1355-1357, 01 2011. (SCI)
16.
Ting-Hsiang Huang , Zingway Pei , Wen-Kai Lin , Shu-Tong Chang , Kou-Chen Liu , “Oligomer semiconductor/dielectric interface modification for organic thin film transistor hysteresis reduction,” Thin Solid Films, no. 518, pp. 7381-7384, 01 2010. (SCI)
17.
M. H. Lee, S. T. Chang, S. Maikap, C.-Y. Peng, and C.-H Lee, , “High Ge Content of SiGe Channel p-MOSFETs on Si (110) Surfaces,,” IEEE Electron Device Letters, 2010, vol. 2, no. 31, pp. 141-143, 01 2010. (SCI)
18.
M. H. Lee,S. T. Chang, C.-C. Lee,J.-J. Huang, G.-R. Hu,Y.-S. Huang, “The Gap State Density of Micro/Nano-Crystalline Silicon Active Layer on Flexible Substrate ,” Thin Solid Films , no. 518, pp. S246-S249, 01 2010. (SCI)
19.
C.-Y. Peng, C.-F. Huang, Y.-C. Fu, Y.-H. Yang, C.-Y. Lai, S.-T. Chang, and C. W. Liu, “Comprehensive study of the Raman shifts of strained silicon and germanium,” Journal of Applied Physics, vol. 083537-1-10, no. 105, pp. 083537-1-10, 04 2009. (SCI)
20.
Z. Pei,S. T. Chang, C. W. Liu, Y.C. Chen, “Numerical Simulation on the Photovoltaic Behavior of an Amorphous Silicon Nanowire Array Solar Cell,” IEEE Electron Device Letter , no. 30, pp. 1305-1307, 01 2009. (SCI)
21.
Cheng-Yi Peng, Ying-Jhe Yang, Yen-Chun Fu, Ching-Fang Huang, Shu-Tong Chang, and CheeWee Liu, “Effects of Applied Mechanical Uniaxial and Biaxial Tensile Strain on the Flat-band Voltage of (001), (110) and (111) Metal-Oxide-Silicon Capacitors,” IEEE Trans. Electron Dev., vol. 1736-1745, no. 56, 01 2009. (SCI)
22.
Min-Hung Lee, S. T. Chang, Yi-Chun Wu, Ming Tang, and Chung-Yi Lin, “Mechanical Bending Cycles of Hydrogenated Amorphous Silicon Layer on Plastic Substrate by Plasma-Enhanced Chemical Vapor Deposition for Use in Flexible Displays,” Japanese Journal of Applied Physics, no. 48, pp. 021301-1-4, 01 2009. (SCI)
23.
S. T. Chang, “Strain Effect and Surface Orientation on Drive Current Enhancement of Ballistic Germanium n-Channel Metal-Oxide-Semiconductor Field-Effect-Transistors,” Japanese Journal of Applied Physics, no. 47, pp. 5345-5351, 01 2008. (SCI)
24.
Y.-J. Yang, W. S. Ho, C.-F. Huang, S. T. Chang, and C. W. Liu, “Electron mobility enhancement in strained-germanium n-channel metal-oxide-semiconductor field-effect-transistors,” Applied Phys. Lett., no. 91, pp. 102103-1-3, 01 2007. (SCI)
25.
S. T. Chang, Y. H. Liu, M.-H. Lee, S. C. Lu, and M.-J. Tsai, “Optimal Ge Profile Design for Base Transit Time of Si/SiGe HBTs,” Materials Science in Semiconductor Processing, no. 8, pp. 289-294, 01 2005. (SCI)
26.
C. Y. Lin, S. T. Chang, and C. W. Liu, “Hole Effective Mass in Strained Si1-xCx Alloys on Si (001) Substrate,” Journal of Applied Physics, no. 96, pp. 5037-5041, 01 2004. (SCI)
27.
B.-C. Hsu, C.-H. Lin, P.-S. Kuo, S. T. Chang, P. S. Chen, C. W. Liu, J. –H. Lu, and C. H. Kuan, “Novel MIS Ge-Si Quantum Dot Infrared Photodetectors,” IEEE Electron Device Lett., no. 25, pp. 544-546, 01 2004. (SCI)
28.
S. T. Chang, C. W. Liu, and S. C. Lu, “Base Transit Time of Graded-Base Si/SiGe HBTs Considering Recombination Lifetime and Velocity Saturation,” Solid State Electronics, no. 48, pp. 207-215, 01 2004. (SCI)
29.
B.-C. Hsu, S. T. Chang, T.-C. Chen, P.-S. Kuo, P. S. Chen, Z. Pei, and C. W. Liu, “A High Efficient 820 nm MOS Ge Quantum Dot Photodetector,” IEEE Electron Device Lett., no. 24, pp. 318-320, 01 2003. (SCI)
30.
S. T. Chang, C. Y. Lin, and C. W. Liu, “Energy Band Structure of Strained Si1-xCx alloys on Si(001) Substrate,” Journal of Applied Physics, no. 92, pp. 3717-3723, 01 2002. (SCI)
● Book 
1.
李敏鴻、張書通, “Chapter 8 應變矽製程 ,” 新世代積體電路製程技術 , 09 2011.
2.
劉致為、張書通, “利用機械應變矽增加積體電路速度的方法,,” 知識創新,第五十四期, 12 2004.
3.
曾華洲、張書通, “矽鍺電晶體,” 電子與材料雜誌24期, pp. 42-57, 2004.
4.
劉致為、張書通, “矽鍺技術,” 電子月刊九月號第98期, 積體電路技術專輯, pp. 110-119, 2003.
● Technical Report 
1.
張書通, “局部應變矽造成應變矽CMOS效應研究,” 工研院學界合作計畫期末報告.
● Patent 
1.
李敏鴻、陳治瑜、劉箐茹、張書通, “異質接面薄本質層太陽能電池,” 中華民國專利:證書號M544706 , 01 2017.
2.
C.Y. Yu, S.-R. Jan, S. T. Chang, C. W. Liu, “METHOD WITH MECHANICALLY STRAINED SILICON FOR ENHANCING SPEED OF INTERGRATED CIRCUITS OR DEVICES,” US 7,307,004, pp. US patent, 01 2007.
3.
李敏鴻、張書通、陸新起、劉致為, “應變矽碳場效電晶體,” 證書號:I 270986;中華民國專利, 01 2007.
4.
M.-H Lee, S. T. Chang, S. C. Lu, C. W. Liu, “Strained Silicon Carbon MOFET Structure and Fabrication Method Thereof,” US 7091522 B2;US patent, 01 2006.
5.
張書通、黃仕澔、劉致為, “應變矽鰭形場效電晶體,” 中華民國專利,證書號:I 231994, 2005.
6.
張書通、黃仕澔、劉致為, “利用機械應變矽增加積體電路速度的方法,” 中華民國專利,公告編號:557484,證書號:191047, 2003.
7.
張書通、李敏鴻, “對稱性N型/P型金屬絕緣場效電晶體之組合結構及其製造方法,” 中華民國專利: 證書號 I 307959.