黃穎聰教授 - 系統晶片組
重要經歷
技術顧問 美商迅捷光電 (2017/2 ~ 2019/1)
主任 孟堯晶片中心 (2007/08至2010/07)
副教授 國立中興大學電機工程學系(2005/8)
副教授 國立雲林科技大學電子工程學系(1993/8-2005/7)
組長 國立雲林科技大學技術合作處技術服務組(1997/09-2003/01)
顧問 工研院光電所，scalable video codec project (2003/01-03)
顧問 工研院電通所，DAB project(1999/08-2000/01)
工程師 Intel Inc.IMD dept.,Folsom, CA. USA (1992/6-1992/9)
助教 美國威斯康辛大學 (1990/1 - 1992/5)
研究助理 美國威斯康辛大學 (1984/8 - 1985/6)
主任 孟堯晶片中心 (2007/08至2010/07)
副教授 國立中興大學電機工程學系(2005/8)
副教授 國立雲林科技大學電子工程學系(1993/8-2005/7)
組長 國立雲林科技大學技術合作處技術服務組(1997/09-2003/01)
顧問 工研院光電所，scalable video codec project (2003/01-03)
顧問 工研院電通所，DAB project(1999/08-2000/01)
工程師 Intel Inc.IMD dept.,Folsom, CA. USA (1992/6-1992/9)
助教 美國威斯康辛大學 (1990/1 - 1992/5)
研究助理 美國威斯康辛大學 (1984/8 - 1985/6)
研究領域
Wireless/wired communication baseband IC design
Video/Audio Codec SOC design
Low power circuit designs
Embedded systems and FPGA prototyping
Video/Audio Codec SOC design
Low power circuit designs
Embedded systems and FPGA prototyping
學術服務
- 2019 International SoC Design Conference, General Co-Chair
- 2019 IEEE International Conf. on Artificial Intelligence Circuits & Systems, Treasurer
- 2018 IEEE ICCE-TW general chair
- 2017 IEEE ICCE-TW special session chair
- 2017 ~ now，教育部智慧聯網技術與應用人才培育計畫總召集人
- 2020 ~ now，台灣積體電路設計學會，監事
- 2018 ~ 2020，台灣積體電路設計學會，常務理事
- 2014 ~ 2018，台灣積體電路設計學會，理事
- 2012 ~ 2013，IEEE Circuits & Systems Society, Taipei Chapter，執行秘書
- 2012 IEEE Asia Pacific Conference on Circuits & Systems, Technical program chair
- 2012 ~ now, IEEE CAS DiSP technical committee, TC member
- 2012 IEEE International Conference on Circuits & Systems, International Liaison
- 2011 ~ now, IEEE CAS, Nano-Giga technical committee, TC member
- 2008 ~ 2012, International Symposium on VLSI Design, Automation & Test, TC member
- 2009 ~ 迄今，教育部顧問室智慧電子應用設計跨校聯盟，指導委員
- 2007，高性能計算編譯技術研討會，大會主席
- 2006 ~ 2009，教育部顧問室prototyping & Layout跨校教改聯盟，指導委員
- 2004 ~ 2006，台灣積體電路設計學會，理事
- 2002 ~ 2006，教育部顧問室prototyping & Layout跨校教改聯盟，聯盟召集人
- 2001 ~ 迄今，超大型積體電路設計暨計算機輔助設計技術研討會，議程委員
- 2001 ~ 迄今，高性能計算編譯技術研討會，議程委員
- 2000，超大型積體電路設計暨計算機輔助設計技術研討會，議程主席
- 2019 IEEE International Conf. on Artificial Intelligence Circuits & Systems, Treasurer
- 2018 IEEE ICCE-TW general chair
- 2017 IEEE ICCE-TW special session chair
- 2017 ~ now，教育部智慧聯網技術與應用人才培育計畫總召集人
- 2020 ~ now，台灣積體電路設計學會，監事
- 2018 ~ 2020，台灣積體電路設計學會，常務理事
- 2014 ~ 2018，台灣積體電路設計學會，理事
- 2012 ~ 2013，IEEE Circuits & Systems Society, Taipei Chapter，執行秘書
- 2012 IEEE Asia Pacific Conference on Circuits & Systems, Technical program chair
- 2012 ~ now, IEEE CAS DiSP technical committee, TC member
- 2012 IEEE International Conference on Circuits & Systems, International Liaison
- 2011 ~ now, IEEE CAS, Nano-Giga technical committee, TC member
- 2008 ~ 2012, International Symposium on VLSI Design, Automation & Test, TC member
- 2009 ~ 迄今，教育部顧問室智慧電子應用設計跨校聯盟，指導委員
- 2007，高性能計算編譯技術研討會，大會主席
- 2006 ~ 2009，教育部顧問室prototyping & Layout跨校教改聯盟，指導委員
- 2004 ~ 2006，台灣積體電路設計學會，理事
- 2002 ~ 2006，教育部顧問室prototyping & Layout跨校教改聯盟，聯盟召集人
- 2001 ~ 迄今，超大型積體電路設計暨計算機輔助設計技術研討會，議程委員
- 2001 ~ 迄今，高性能計算編譯技術研討會，議程委員
- 2000，超大型積體電路設計暨計算機輔助設計技術研討會，議程主席
榮譽獎勵
- 中興大學109 ~ 111學年度 特聘教授
- 中興大學108學年度產學績優教師
- 中興大學103學年度工學院優良導師
- 中興大學100學年度工學院產學合作優良獎
- 中興大學101學年度工學院優良導師
- Best paper award, 2019 ISoCC, Jeju, Korea, Wei-Hsuan Ma ; Kuan-Ying Chang ; Kuan-Ting Chen ; Yin-Tsung Hwang ; Jin-Fa Lin, “Projection Matching Pursuit based DoA Estimation Scheme and its FPGA Implementation,”
- Best paper award, 1st place, 2015 IEEE ICCE-TW, Yin-Tsung Hwang, Hung-Ruey and Bing-Chen Tsai, Efficient block adaptive point spread function estimation and out-of-focus image restoration scheme
- Best Student Paper Award, 2009 Conference on Innovative Application of System Prototyping and Circuit Design , Yin-Tsung Hwang, Cheng-Chen Lin, Ruei-Ting Hung1, Jiun-Jiang Chen, “Lossless Hyperspectral Image Compression System based on HW/SW Co-design”
- Best Paper Award, 2006 Workshop on Consumer Electronics and signal Processing , J.F. Lin, Y.T. Hwang, M.H. Sheu, C.J. Sheu and H.Y. Chen, “Low power multiplier designs based on improved row & column bypassing schemes”
- Best paper award, 2004 IEEE Asia-Pacific Conf. On Circuits & Systems, Y.T. Hwang, K.H. Cheng, L.C. Liang and C.C. Lin, “A novel wavelet coefficients coding scheme and its FPGA realization”
- 日產汽車風雲賞科技組銅牌獎指導教授，2008
- 教育部九十七學年度大學校院積體電路設計競賽佳作指導教授
- 教育部九十七學年度大學校院嵌入式系統設計競賽佳作指導教授
- 教育部九十二學年度大學校院FPGA設計競賽佳作指導教授，2004/06/15
- 教育部九十一學年度大學校院積體電路設計競賽優等指導教授，2003/06/15
- 教育部九十一學年度大學校院FPGA設計競賽佳作指導教授，2003/06/15
- 中興大學108學年度產學績優教師
- 中興大學103學年度工學院優良導師
- 中興大學100學年度工學院產學合作優良獎
- 中興大學101學年度工學院優良導師
- Best paper award, 2019 ISoCC, Jeju, Korea, Wei-Hsuan Ma ; Kuan-Ying Chang ; Kuan-Ting Chen ; Yin-Tsung Hwang ; Jin-Fa Lin, “Projection Matching Pursuit based DoA Estimation Scheme and its FPGA Implementation,”
- Best paper award, 1st place, 2015 IEEE ICCE-TW, Yin-Tsung Hwang, Hung-Ruey and Bing-Chen Tsai, Efficient block adaptive point spread function estimation and out-of-focus image restoration scheme
- Best Student Paper Award, 2009 Conference on Innovative Application of System Prototyping and Circuit Design , Yin-Tsung Hwang, Cheng-Chen Lin, Ruei-Ting Hung1, Jiun-Jiang Chen, “Lossless Hyperspectral Image Compression System based on HW/SW Co-design”
- Best Paper Award, 2006 Workshop on Consumer Electronics and signal Processing , J.F. Lin, Y.T. Hwang, M.H. Sheu, C.J. Sheu and H.Y. Chen, “Low power multiplier designs based on improved row & column bypassing schemes”
- Best paper award, 2004 IEEE Asia-Pacific Conf. On Circuits & Systems, Y.T. Hwang, K.H. Cheng, L.C. Liang and C.C. Lin, “A novel wavelet coefficients coding scheme and its FPGA realization”
- 日產汽車風雲賞科技組銅牌獎指導教授，2008
- 教育部九十七學年度大學校院積體電路設計競賽佳作指導教授
- 教育部九十七學年度大學校院嵌入式系統設計競賽佳作指導教授
- 教育部九十二學年度大學校院FPGA設計競賽佳作指導教授，2004/06/15
- 教育部九十一學年度大學校院積體電路設計競賽優等指導教授，2003/06/15
- 教育部九十一學年度大學校院FPGA設計競賽佳作指導教授，2003/06/15
學術著作
● 期刊論文
1.
Tsung-Hsien Liu, Shih-Lun Wang, You-Jia Lin, Yin-Tsung Hwang, Chiao-En Chen, and Yuan-Sun Chu, , “Fixed-Complexity Tree Search Schemes for Detecting Generalized Spatially Modulated Signals: Algorithms and Hardware Architectures,” IEEE Trans. On Circuits & Systems I, REGULAR PAPERS, vol. 2, no. 68, pp. 904 - 917, 02 2021. (SCI)
2.
Kuan-Ting Chen, Yin-Tsung Hwang, and Cheng-Yi Huang, “Design and Chip Implementation of A SMI/MVDR Dual-mode Beamformer for Wireless MIMO Communication Systems,” IEEE Access, no. 8, pp. 67940 – 67954, 04 2020. (EI、SCI)
3.
Kuan-Ting Chen, Wei-Hsaun Ma, Yin-Tsung Hwang, and, Kuan-Ying Chang, “A Low Complexity, High Throughput DoA Estimation Chip Design for Adaptive Beamforming,” Electronics MDPI, vol. 4, no. 9, pp. 1 - 27, 04 2020. (EI、SCI)
4.
Tsung-Hsien Liu, You-Zhi Ye, Chen-Kai Huang, Chiao-En Chen, Yin-Tsung Hwang, and Yuan-Sun Chu, “A Low-Complexity Maximum Likelihood Detector for the Spatially Modulated Signals: Algorithm and Hardware Implementation,” IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 11, no. 66, pp. 1820 – 1824, 11 2019. (EI、SCI)
5.
Kuan-Ting Chen, Yin-Tsung Hwang, and Yen-Chang Liao, “VLSI Design of a High Throughput Hybrid Precoding Processor for Wireless MIMO Systems,” IEEE access, no. 7, pp. 85925 – 85936, 06 2019. (EI、SCI)
6.
J. F. Lin, M. H. Sheu, Y.T. Hwang, C.S. Wong, M,Y. Tsai, “Low power 19-Transistor true single phase clocking FF designs based on logic structure reduction schemes,” IEEE Trans. on VLSI systems, vol. 11, no. 25, pp. 3033-3044, 11 2017. (EI、SCI)
7.
S.-M. Siao, M.-H. Sheu, Yin-Tsung Hwang, S.-Y. Wang, “Efficient reverse converter design for the new four-moduli set,” Journal of Chinese Institute of Engineers, vol. 3, pp. 1-8, 03 2017. (EI、SCI)
8.
M.-H. Sheu, S.-M. Siao, Yin-Tsung Hwang, C.-C. Sun, Y.-P. Lin, “New adaptable three moduli set for residue number system based finite impulse response implementation,” IEICE Electronics Express, vol. 11, no. 13, pp. 1-9, 05 2016. (EI、SCI)
9.
3. M.-H. Sheu, S.-M. Siao, Yin-Tsung Hwang, Y.-C. Wang and K.-T. Lee, “New reverse converter design for 4-moduli set {2^2n,2^(n+1)-1, 2^n/2-1,2^n/2+1},” ICIC Express letter, Part B: applications, vol. 5, no. 7, pp. 1111-1117, 01 2016. (EI)
10.
6. M.-H. Sheu, S.-M. Siao, Y.-C. Kuo, Yin-Tsung Hwang, J.-J. Jhang, G.-Y. Lin, “New efficient reverse converter for 3 moduli set based on new CRT-I,” ICIC Express letter, Part B: applications, vol. 2, no. 6, pp. 557-562, 02 2015. (EI)
11.
Jin-Fa Lin, Yin-Tsung Hwang, Chen-Syuan Wong and Ming-Hwa Sheu, “Single-ended structure sense-amplifier based flip-flop for low-power systems,” IET Electronics Letters, vol. 1, no. 51, pp. 20-21, 01 2015. (EI、SCI)
12.
Jing-Shiun Lin, Yin-Tsung Hwang, Shih-Hao Fang, Po-Han Chu and Ming-Der Shieh, “Low-complexity High-throughput QR Decomposition Design for MIMO Systems,” IEEE Transactions on Very Large Scale Integration Systems, pp. accepted, 01 2015. (EI、SCI)
13.
Yin-Tsung Hwang, Ming-Wei Lyu, Chen-Cheng Lin, “A Low Complexity Embedded Compression Codec Design with Rate Control for High Definition Video,” IEEE Transcations on Circuits and Systems for Video Technology, accepted, (regular paper), 12 2014. (EI、SCI)
14.
Yin-Tsung Hwang, Wei-Da Chen and Cheng-Ru Hung, “A Low Complexity Geometric Mean Decomposition Computing Scheme and Its High Throughput VLSI Implementation,” IEEE Transactions on Circuits and Systems I: Regular papers, vol. 4, no. 64, pp. 1170 - 1182, 04 2014. (EI、SCI)
15.
Wei-Da Chen and Yin-Tsung Hwang, “A Constant Throughput Geometric Mean Decomposition Scheme Design for Wireless MIMO Precoding,” IEEE Transactions on Vehicular Technology, vol. 5, no. 62, 05 2013. (EI、SCI)
16.
Yin-Tsung Hwang and Jin-Fa Lin, “Low Voltage and Low Power Divide-By-2/3 Counter Design Using Pass Transistor Logic Circuit Technique,” IEEE Transactions on Very Large Scale Integration Systems, vol. 9, no. 20, 09 2012. (EI、SCI)
17.
Yin-Tsung Hwang and Wei-Da Chen, “Design and Implementation of a High Throughput Fully-Parallel Complex-Valued QR Factorization Chip,” IET Circuits, Devices & Systems, , no. 5, pp. 424-432, 05 2011. (EI、SCI)
18.
Yin-Tsung Hwang, Jin-Fa Lin and Ming-Hwa Sheu, “Low Power Pulse-Triggered Flip-Flop Design with Conditional Pulse Enhancement Scheme,” IEEE Transactions on Very Large Scale Integration Systems, 02 2011. (EI、SCI)
19.
Yin-Tsung Hwang, Feng-Ming Chang, Shin-Wen Chen, “Narrow Band Power Line Communication Transceiver Design for Household Control Systems,” Journal of Engineering, vol. 1, no. 22, pp. 1-22, 01 2011.
20.
Yin-Tsung Hwang and Cheng-Chen Lin, “Lossless Hyperspectral Image Compression System Based on HW/SW Co-design,” IEEE Embedded System letters, 01 2011.
21.
J.F. Lin, Yin-Tsung Hwang, M.H. Sheu, “A Low Complexity Dual-Mode Pulse-Triggered Flip- Flop Design Based on Unified AND/XNOR Logic,” IEICE Trans. on Fundamental, vol. 12, no. Vol.E93-A, 12 2010. (EI、SCI)
22.
Cheng-Chen Lin and Yin-Tsung Hwang, “Lossless Compression of Hyperspectral Images Using Adaptive Prediction and Backward Search Schemes,” Journal of Information Science & Engineering, 12 2010. (EI、SCI)
23.
Chung-Chuan Wang, Yin-Tsung Hwang, Chin-Chen Chang and Jinn-Ke Jan, “Hiding Information in Binary Images with Complete Reversibility and High Embedding Capacity,” International Journal of Innovative Computing, Information and Control, vol. 12, no. 6, 12 2010. (EI、SCI)
24.
J.F. Lin, Y.T. Hwang, M.H. Sheu, “Low Power Pulse Generator Design Using Hybrid Logic,” IEICE Trans. on Fundamental, vol. 6, no. E93-A, 06 2010. (EI、SCI)
25.
J.F. Lin, Y.T. Hwang, M.H. Sheu, “A Low Complexity Low Power Signal Transition Detector Design for Self-Timed Circuits,” IEICE Trans. on Fundamental, vol. 4, no. Vol.E93-A, 04 2010. (EI、SCI)
26.
Cheng-Chen Lin and Yin-Tsung Hwang, “An Efficient Lossless Compression Scheme for Hyperspectral Images Using Two-Stage Prediction,” IEEE Transactions on Geographical Remote Sensing Letters, vol. 3, no. 7, pp. 558-562, 01 2010. (EI、SCI)
27.
Y.T. Hwang and Wei-Da Chen, “A low complexity complex QR factorization design for real time MIMO signal detection,” International Journal of Electrical Engineering, vol. 3, no. 16, pp. 185-194, 03 2009. (EI)
28.
J.F. Lin, Y.T. Hwang, M.H. Sheu, “Low complexity pulse generator designs,” IEICE Trans. on Fundamental, no. E91-A, 07 2008. (EI、SCI)
29.
J.F. Lin, Y.T. Hwang, M.H. Sheu and C.C. Ho, “A Novel High Speed and Energy Efficient 10-Transistor Full Adder Design,” IEEE Transaction on Circuits & Systems I, no. 54, pp. 1050-1059, 05 2007. (EI、SCI)
30.
C.H. Wu, C.M. Wu, M.D. Shieh, and Y.T. Hwang, “VLSI architectural design tradeoffs for sliding-window log-map decoders,” IEEE Trans. on VLSI systems, 2006. (EI、SCI)
31.
T.Y. Hwang, C.T. King, Y.T. Hwang and Y.L. Lin, “embedded software consortium of Taiwan,” ACM Transactions in Embedded Computing Systems, 2006. (EI、SCI)
32.
C.H. Wu, C.M. Wu, M.D. Shieh, and Y.T. Hwang, “High speed, low complexity systolic design of novel iterative division algorithms in GF(2^m),” IEEE Trans. on computers, vol. 3, no. 53, pp. 375-380, 03 2004. (EI、SCI)
33.
M.-D. Shieh, C.-M. Wu, Y.-T. Hwang, H.-F. Lo, and M.-H. Hu, “Realization of Area-Efficient FFT Processors for DAB System,” Journal of the Chinese Institute of Electrical Engineering, vol. 3, no. 10, pp. 269-280, 2003. (EI)
34.
C.H. Wu, C.M. Wu, M.D. Shieh, and Y.T. Hwang, “Novel Algorithms and VLSI Design for Division over GF(2m),” IEICE Trans. on Fundamentals, vol. 5, no. E85-A, pp. 1129-39, 05 2002. (EI、SCI)
35.
Yin-Tsung Hwang, Ying-Chou Chung and Jer-Sho Hwang, “High Performance Code Generation for Digital Signal Processors,” Journal of Computers, vol. 3, no. 12, pp. 50-62, 09 2000.
36.
Yin-Tsung Hwang and Jer-Sho Hwang, “Simulated Evolution Based Parallel Code Generation for Programmable DSP Processors,” Journal of Information Science & Engineering, vol. 1, no. 14, pp. 138-165, 1998. (EI、SCI)
37.
Yin-Tsung Hwang, Yuan-Hung Wang and Jer-Sho Hwang, “Rapid Prototyping of Hardware/Software Codesign for Embedded Signal Processing,” Journal of Information Science & Engineering, vol. 3, no. 14, pp. 605-632, 1998. (EI、SCI)
38.
Yin-Tsung Hwang and Yu Hen Hu, “A Unified Partitioning and Scheduling Scheme for Mapping Multi-stage Regular Iterative Algorithms onto Systolic Arrays,” Journal of VLSI Signal Processing, no. 11, pp. 133-150, 1995. (EI、SCI)
39.
Yin-Tsung Hwang and Yu Hen Hu, “MSSM - A Design Aid for Multi-Stage Systolic Mapping,” Journal of VLSI Signal Processing, no. 4, pp. 125-145, 1992. (EI、SCI)
● 研討會論文
1.
Chu-Chen Wu, Jia-Jhan Nian, and Yin-Tsung Hwang, “Design and Implementation of a Under-Sampling Ultrasound Phased Array Radar,” The 20th International Conf. on Electronics, Information and Communication (ICEIC 2021), 02 2021. Jeju, Korea,
2.
Kuan-Ying Chang, Wei-Hsuan Ma, Yin-Tsung Hwang, “A Low Complexity 2D DoA Estimation Scheme for L-shaped Antenna Array,” Taiwan and Japan Conference on Circuits and Systems, 07 2019. Nikko, Japan,
3.
Kuang-Ying Chang, Kuan-Ting Chen, Wei-Hsuan Ma, and Yin-Tsung Hwang, “An Enhanced MUSIC DoA Scanning Scheme for Array Radar Sensing in Autonomous Movers,” IEEE Int’l Conf. on Artificial Intelligence Circuits and Systems, 03 2019. Hsinchu, Taiwan,
4.
Bo-Yuan Hong, Yin-Tsung Hwang, “High Volume Rate Parallel Beamformer Design for 3D Medical Ultrasound Imaging,” IEEE Int’l Conf. on Electronic, Information and Communication, 01 2019. Auckland, New Zealand,
5.
Wei-Hsuan Ma ; Kuan-Ying Chang ; Kuan-Ting Chen ; Yin-Tsung Hwang ; Jin-Fa Lin, “Projection Matching Pursuit based DoA Estimation Scheme and its FPGA Implementation,” International SoC Design Conference (ISOCC), 01 2019. Jeju, Korea,
6.
Kuan-Ting Chen, Yen-Chang Liao, Yin-Tsung Hwang, “Design and Implementation of an Efficient Precoding Chip for Hybrid Beamforming Systems,” Taiwan and Japan Conference on Circuits and Systems, 08 2018. Taichung, Taiwan,
7.
Yu-Ming Huang, Yin-Tsung Hwang, “A Constant Rate Block Based Image Compression Scheme for Video Display Link Applications,” IEEE Int’l Conf. on Consumer Electronics , 05 2018. Taichung, Taiwan,
8.
Yu-Wei Cheng, Jun-Han Chang, Yin-Tsung Hwang, “Design and FPGA implementation of a CCSDS compliant data compression system for remote sensing images,” Remote Sensing Satellite Technology Workshop, 12 2017. Hsinchu, Taiwan,
9.
Yu-Wei Cheng, Yin-Tsung Hwang, “Development of a High Throughput Image Compression System for Optical Remote Sensing,” IEEE Conf. on Dependable and Secure Computing, 09 2017. Taipei, Taiwan,
10.
Shin-Shiang Wang, Yi-Chi Tien, Yin-Tsung Hwang, Jin-Fa Lin, and Guo-Zua Wu, “MVDR Based Adaptive Beamformer Design and Its FPGA Implementation for Ultrasonic Imaging,” IEEE Aisa Pacific Conf. on Circuits & Systems, 10 2016. Jeju, Korea,
11.
Ciao-Kai Yu, Bing-Chen Tsai and Yin-Tsung Hwang, “An Efficient Motion Blurred Image Restoration Scheme based on Frequency Domain Estimation,,” IEEE International Conference on Consumer Electronics, 05 2016. Nantou, Taiwan,
12.
Kuan-Ting Chen, Yin-Tusng Hwang, “FPGA prototyping of a 2X2 wireless MIMO OFDM system with precoding scheme,” the 4th Internal Conference on Innovation, Communication and Engineering, 10 2015. Hunan, China,
13.
Yin-Tsung Hwang, Hung-Ruey Wen, Bing-Chen Tsai, “Efficient block adaptive point spread function estimation and out-of-focus image restoration scheme,” Int’l Conference on Consumer Electronics, 06 2015. Taipei, Taiwan,
14.
Yin-Tsung Hwang, Bing-Cheng Tsai, and others, “Feature Points Based Video Object Tracking for Dynamic Scenes and Its FPGA System Prototyping,” Yin-Tsung Hwang, Bing-Cheng Tsai, and others, “Feature Points Based Video Object Tracking for Dynamic Scenes and Its FPGA System Prototyping,” Tenth International Conference on Intelligent Information Hiding and Multimedia Signal Processing, 08 2014. KitaKyuShu, Japan,
15.
Yin-Tsung Hwang and Juin-Yen Chen, “An IP Interface Design Compiler with SystemC based Input Specifications,” IEEE NEWCAS 2014, 06 2014. Quebec, Canada,
16.
Yin-Tsung Hwang, Yi-Yo Chen, “Design and Implementation of a high throughput soft output MIMO signal detector,” IEEE workshop on Signal Processing Systems, 09 2013.
17.
Yin-Tsung Hwang, Yi-Yo Chen, Sung-Jun Tsai, “A 2G Samples/s Real-Valued FFT Processor Design and Its FPGA Realization for Optical OFDM Systems,” The 28th Int’l Technical Conference on Circuits/Systems, Computers and communications, 07 2013. YeoSu, Korea,
18.
Yin-Tsung Hwang, Yi-Chih Chen, Cheng-Ru Hong, and others, “Design and implementation of an FMCW radar baseband processor,” IEEE Asia Pacific Caircuits and Systems Conference, 12 2012.
19.
Yin-Tsung Hwang and Tao-Hsing Huang, “Efficient TWIN-VQ Audio Decoder Implementation on a Configurable Processor using Instruction Extension,” IEEE ISCAS 2012, 05 2012. Seoul, Korea,
20.
Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu, “Low Power 10-Transistor Full Adder Design Based on Degenerate Pass Transistor Logic,” IEEE ISCAS 2012, 05 2012. Seoul, Korea,
21.
Jing-Shiun Lin, Yin-Tsung Hwang, Po-Han Chu, Ming-Der Shieh, and Shih-Hao Fang, “An Efficient QR Decomposition Design for MIMO Systems,” IEEE ISCAS 2012, 05 2012. Seoul, Korea,
22.
Yin-Tsung Hwang, Sung-Jun Tsai, Yi-Yo Chen, “Design and Implementation of an optical OFDM baseband receiver in FPGA,” VLSI-DAT Symposium, 04 2012. Hsinchu,
23.
9. Jiun-Yan Chen, Kuo-Feng Hung, Hsin-Yi Lin, Yen-Chung Chang, Yin-Tsung Hwang, Ciao-Kai Yu, Cheng-Ru Hong, Chin-Chia Wu, Yung-Jung Chang, “Real-time FPGA-based Template Matching Module for Visual Inspection Application,” The 2012 IEEE/ASME International Conference on Advanced Intelligent Mechatronics, 03 2012.
24.
Yin-Tsung Hwang and Shin-Wen Chen, “Hardware Efficient Design for Narrow Band Power Line Communication Modem,” IEEE TENCON, 11 2011. Bali, Indonesia,
25.
Yin-Tsung Hwang, Feng-Ming Chang, and Shin-Wen Chen, “Low Complexity Baseband Transceiver Design for Narrow Band Power Line Communication,” IEEE ISCAS 2011, 05 2011. Barzil,
26.
Cheng-Ru Hong , Yin-Tsung Hwang, Wei-Chieh Hsu, Chi-Ho Chang, Jui-Chi Huang, Ho-En Liao, “Programmable AND-CFAR Signal Detector Design and Its FPGA Prototyping for FMCW Radar Systems,” VLSI-DAT Symposium, 04 2011.
27.
Yin-Tsung Hwang, Chen-Cheng Lin, Ming-Wei Lyu, “Design and Implementation of a Low Complexity Lossless Video Codec,” IEEE Asia Pacific Conference on Circuits & Systems, 10 2010. Malaysia,
28.
Cheng-Chen Lin, Yin-Tsung Hwang, Yi-Chen Chang, and Ming-Wei Liu, “High efficiency and low complexity lossless image compression system,” 21st VLSI/CAD design symposium, 08 2010.
29.
Cheng-Chen Lin, Yin-Tsung Hwang, Yi-Chen Chang, and Ming-Wei Liu, “Efficient Lossless Data Compression Codec Design for Multiband Images,” 21st VLSI/CAD design symposium, 08 2010.
30.
Cheng-Chen Lin, Yin-Tsung Hwang, Yi-Chen Chang, Jiun-Jiang Chen, and Ming-Wei Liu, “Lossless Coding of Multiband Images Using Interband Data Correlation and Error Feedback Prediction Scheme,” 6th international conf. on intelligent information hiding and Multimedia Signal Processing, 08 2010. Darmstadt, Germany,
31.
Yin-Tsung Hwang and Wei-Da Chen, “MMSE-QR Factorization Systolic Array Design for Applications in MIMO Signal Detections,” IEEE ISCAS, 05 2010. Paris, France,
32.
Yin-Tsung Hwang, Feng-Ming Chang, and Shin-Wen Chen, “Power Line Communication Baseband Processor Design for Smart Power Control Network,” International Conference on High-Speed Circuits Design, 2010, 04 2010.
33.
Jin-Fa Lin, Yin-Tsung Hwang, Ming-Hwa Sheu and Yu-Ru Cho, “A Novel Low Power Pulse-Triggered Flip-Flop Design with Pulse Width Control Scheme,” 20th VLSI/CAD design symposium, 08 2009. Hualien, Taiwan,
34.
Yin-Tsung Hwang, Wei-Da Chen, “Systolic MMSE-QR Factorization Design Based on a Symmetrical Nullification Scheme,” 20th VLSI/CAD design symposium, 08 2009. Hualien, Taiwan,
35.
Yin-Tsung Hwang and Hwa-Hsin Luo, “Automatic IP Interface Synthesis Supporting Multi-Layer Communication Protocols in SoC Designs,” The Fifth International Conference on Information Assurance and Security, 08 2009. XiAn, China,
36.
Yin-Tsung Hwang, Cheng-Chen Lin, Ruei-Ting Hung1, Jiun-Jiang Chen, “Lossless Hyperspectral Image Compression System based on HW/SW Co-design,” Conference on Innovative Application of System Prototyping and Circuit Design, 06 2009.
37.
Yin-Tsung Hwang, Jun-Yen Chen and Jun-Jieh Chiu, “HW/SW Auto-Coupling for fast IP Integration in SoC Designs,” IEEE ICESS, 07 2008. Chen-Du, China,
38.
Yin-Tsung Hwang, Wei-Da Chen, “A Low Complexity Complex QR Factorization Design for Signal Detection in MIMO OFDM Systems,” IEEE ISCAS, 05 2008. Seattle, USA,
39.
2Jun-Yen Chen, Yin-Tsung Hwang, Jun-Jieh Chiu, “An IP Interface Compiler with SystemC Protocol Specifications,” Workshop on Compiler techniques and high performance computing, 02 2008. Taipei,
40.
Yin-Tsung Hwang, Cheng-Chen Lin and Kuan-Hsun Tseng, “Scalable Lossless Video Coding Based on Adaptive Motion Compensated Temporal Filtering,” IEEE Int’l Symp. on Multimedia, Workshop on Scalable Video Coding & Transport, 12 2007.
41.
Yin-Tsung Hwang1, Jin-Fa Lin, Ming-Hwa Sheu and Chia-Jen Sheu, “low power multipliers using enhanced row bypassing schemes,” IEEE workshop on Signal Processing Systems, 10 2007. ShangHai, China,
42.
Cheng-Chen Lin, Yin-Tsung Hwang, Kwan-Hsun Tseng, Shao-Wen Chen, “wavelet based lossless video compression using motion compensated temporal filtering,” IEEE workshop on Signal Processing Systems, 10 2007. ShanHai, China,
43.
Yin-Tsung Hwang, Ying-Ji Chen and Wei-Da Chen, “Scalable FFT Kernel Designs for MIMO OFDM Based Communication Systems,” IEEE TENCON, 10 2007.
44.
Jin-Fa Lin *2, Yin-Tsung Hwang #1, Ming-Hwa Sheu * and Wei-Rong Ciou, “A Novel Low Complexity Pulse-Triggered Flip-Flop Design with Dual Triggering Mode,” 18th VLSI/CAD design symposium, 08 2007.
45.
Y.T. Hwang, J.F. Lin, M.H. Sheu and C.J. Sheu, “Low Power Multiplier Designs Based on Improved Column Bypassing Schemes,” IEEE APCCAS’06, 12 2006. Singapore,
46.
Yin-Tsung Hwang, Tao-Hsin Huang, “Efficient Implementation of an MPEG 4 TWIN-VQ Audio Decoder on a Configurable Processor with Instruction Extension,” Workshop on Compiler Techniques for High Performance Computing, 10 2006.
47.
Y.T. Hwang, J.Y. Chen and M.H. Sheu, “Automatic Generation of Programmable Parallel CRC & Scrambler Designs,” IEEE Workshop on SiPS 2006, 10 2006. Banff, Canada,
48.
Jin-Fa Lin, Ming-Hwa Sheu and Yin-Tsung Hwang, “Low-Power and Low-Complexity Full Adder Designs for Wireless Base Band Applications,” IEEE ICCCAS, 2006, 06 2006. GuiLin, China,
49.
Yin-Tsung Hwang, Sheng-Chi Peng and Jenn Kaie Lain, “A Low-Complexity Channel Estimator for MIMO-OFDM Systems,” IEEE ICCCAS, 06 2006. GuiLin, China,
50.
Yin-Tsung Hwang, Jin-Fa Lin, Ming-Hwa Sheu and Cheng-Che Ho, “A High Speed and Energy Efficient Full Adder Design Using Complementary & Level Restoring Carry Logic,” IEEE ISCAS, 05 2006. Kose, Greece,
51.
Yin-Tsung Hwang, Sin-Chi Lai, “A novel MDCT/IMDCT computing kernel design,” IEEE ISCAS’05, 10 2005. AThen, Greece,
52.
Yin-Tsung Hwang, Chen-Yu Tsai and Cheng-Chen Lin, “Block-wise Adaptive Modulation for OFDM WLAN Systems,” IEEE ISCAS’05, 05 2005. Kobe, Japan,
● 專利
1.
黃穎聰等, “低複雜度的預編碼方法,” 中華民國專利，發明第I469558號, 01 2015.
2.
黃穎聰等, “無失真視訊壓縮系統之動態補償時間濾波器之方法,” 中華民國專利，已核准, 04 2014.
3.
黃穎聰等, “高速雙模預除器,” 中華民國專利，發明第I420823, 12 2013.
4.
黃穎聰等, “雙觸發邏輯電路,” 中華民國專利，已核准, 08 2013.
5.
黃穎聰等, “具公平性之分散式交換電路,” 中華民國專利，發明第I329437號, 08 2010.
6.
黃穎聰等, “以離散小波轉換處理影像之系統,” 中華民國專利，發明第I318073號, 08 2009.
7.
黃穎聰等, “適用於小波轉換視訊編碼之低複雜度頻域移動估測方法,” 中華民國專利，發明第I 351882號, 05 2009.
8.
黃穎聰等, “快速傅立葉轉換系統,” 中華民國專利，發明第I313825號, 01 2009.
9.
黃穎聰等, “互補式進位邏輯電壓補償之全加器,” 中華民國專利，發明第I317903號, 04 2008.
10.
黃穎聰等, “可規劃平行循環冗餘檢查電路及攪散器電路,” 中華民國專利，發明第I 327704號, 01 2008.
11.
Yin-Tsung Hwang and others, “Full adder of complementary carry logic voltage compensation,” 美國專利，patent no. US 7508233 B2, 01 2006.
12.
Yin-Tsung Hwang and others, “Double-Triggered Logic Circuit,” 美國專利，patent no. US 7714627 B1, 01 2006.
13.
Yin-Tsung Hwang and others, “Methods for encoding images according to object shapes,” 美國專利，patent no. US 7565023 B2, 08 2005.
14.
黃穎聰等, “依據物件形狀進行影像編碼的處理方式,” 中華民國專利，發明第I 263172號, 01 2005.